Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

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DisEnchantment

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Mar 3, 2017
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TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.

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N7 performance is more or less understood.
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This year and next year TSMC is mainly increasing capacity to meet demands.

For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.


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Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE
 
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marees

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Apr 28, 2024
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Previous leaks claimed 3nm

 

del42sa

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May 28, 2013
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Previous leaks claimed 3nm

yes, but 3nm pr. turns into disaster
 
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Thunder 57

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It's an Intel designed CPU and last I checked they design high clock CPUs and x86 for the majority.

If Intel designed for 4.7Ghz that is a regressed product. It is a ES1/ES2 that doesn't reach full clocks and the 5% is pure false rumors spread by Taiwanese Media.
I wouldn't believe a single rumor out of TW and returns regarding Intel.

LoL you didn't answer the Proper comparison part.

You don't know any of that. That's just what you hope is true. That said the rumor does seem unlikely. But with Intel pushing back PTL to early 2026 (which you also deny despite Intel's slides saying so) who knows what kind of shape 18A is in.
 
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511

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You don't know any of that. That's just what you hope is true. That said the rumor does seem unlikely. But with Intel pushing back PTL to early 2026 (which you also deny despite Intel's slides saying so) who knows what kind of shape 18A is in.
It's standard Intel EEP launch scheduled they launch 4-5 PTL Laptops with a single SKU this year with volume coming next year.
 

Thunder 57

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It's standard Intel EEP launch scheduled they launch 4-5 PTL Laptops with a single SKU this year with volume coming next year.

We shall see. I'm certainly not buying your "end of September" line otherwise Intel would say Q3. As for you saying December I could see a very limited launch there but I wouldn't be confident. They said early 2026 which sounds like a CES announcement to me with products shortly after.
 

511

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Jul 12, 2024
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We shall see. I'm certainly not buying your "end of September" line otherwise Intel would say Q3. As for you saying December I could see a very limited launch there but I wouldn't be confident. They said early 2026 which sounds like a CES announcement to me with products shortly after.
I am expecting Q4 tbh either October or November.
 

DrMrLordX

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Apr 27, 2000
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If Intel designed for 4.7Ghz that is a regressed product. It is a ES1/ES2 that doesn't reach full clocks and the 5% is pure false rumors spread by Taiwanese Media.

If you think the rumour is false then there's no merit in discussing it further. Either the leak is legit or it isn't. But it should be clear that it is an Intel-designed CPU, it isn't Clearwater Forest, and it very likely isn't limited by design targets or design failures. If true, the limitations are due to process.
 
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511

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If you think the rumour is false then there's no merit in discussing it further. Either the leak is legit or it isn't. But it should be clear that it is an Intel-designed CPU, it isn't Clearwater Forest, and it very likely isn't limited by design targets or design failures. If true, the limitations are due to process.
Clearwater Forest contains the same CPU cores that are in Panther Lake i.e. Darkmont it would be same RTL for the cores and L2.

For the yields they are better than 22nm for 18A! . I can't belive it is a failure if they are saying in front of the ecosystem cause people present there must have done the test chip and must have the data.
 
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LightningZ71

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Mar 10, 2017
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You can do a lot on a test line with LRIP that you can't do in volume on the main lines for a long time. It's a core fact to why chip development takes so blasted long.
 

Doug S

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Feb 8, 2020
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If Intel designed for 4.7Ghz that is a regressed product. It is a ES1/ES2 that doesn't reach full clocks and the 5% is pure false rumors spread by Taiwanese Media.
I wouldn't believe a single rumor out of TW and returns regarding Intel.

Not necessarily. Yes your explanation is clearly the most likely but you can't totally dismiss "designing for 4.7 GHz" as that would not be an unreasonable thing to do for a mobile design. While Apple has been increasing clock rates it has also been increasing power, there's a price to be paid for higher clock rates.

So if you decided to do a design with a shorter pipeline that does more work per pipestage and thus a lower overall clock rate that isn't necessarily a bad thing to do. You'd have a higher IPC but trade that off with a lower clock rate. That's exactly what Intel did (in a big way) when they abandoned P4 for Core, and there was one other inflection point in the Core days (can't remember the details with so many generations/code names over the years) where they regressed a bit on clock rates and gained higher IPC and overall performance.

The max turbo of Lunar Lake is 5.1 GHz so if theoretically they stepped that back to 4.7 GHz in exchange for cutting out a pipe stage it might be both faster and more power efficient. Yes there are benchmarks where clock rate dominates and it would regress slightly in those, but I think most people here are smart enough to realize that if it was faster in most things losing out in just clock rate dominated tasks is a worthwhile tradeoff.

Maximum clock rates have increased very little over the years, and power increases rapidly as you pass the knee of the curve. You can't always make IPC gaining changes without (at least temporarily) trading off frequency. Like I said your explanation that these are ES samples and/or Intel bashing from TSMC favoring Taiwan media is the most likely. But don't bash a CPU with a lower clock rate as a "regressed product". It could be an "improved product".
 

coercitiv

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Jan 24, 2014
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I know you are joking, but given the problems that TSMC had with workers in Arizona... I imagine it'd be 1000x worse in Europe.
I was definitely joking, but the joke is getting better each day: TSMC to open chip design centre in Munich

It's aim is to mostly assist chip manufacturing for automotive and industrial appliances on what we consider legacy nodes, but given the way U.S. is doing business now... anything might be on the table in 4 years from now.
 
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moinmoin

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Jun 1, 2017
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is it me or TSMC is moving closer to it's partner/suppliers.
Sure appears so:

"while being located quite next to Apple's already existing European Silicon Design Center in Munich."

"TSMC joins its largest customer in the Bavarian capital, Apple, which has invested 2 billion euros to build its largest engineering hub in Europe there."
 

Doug S

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Feb 8, 2020
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Sure appears so:

"while being located quite next to Apple's already existing European Silicon Design Center in Munich."

"TSMC joins its largest customer in the Bavarian capital, Apple, which has invested 2 billion euros to build its largest engineering hub in Europe there."

Its easier for Apple and TSMC to open satellite offices in other places around the world like Munich where there are some really good engineers than it is to convince those really good engineers to move to Silicon Valley or Hsinchu.
 

511

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Jul 12, 2024
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Intel is the biggest idiot when it comes to GPU they have been working on their GPU SW Stacks for some time and yet to release a DC grade GPU.
Falcon shores would have been okay at least they would have something to sell but no they had to can it.
Jaguar Shores launches in the same year as Rubin Ultra btw if they don't mess up in DC GPU Department.
 
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