Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

[Tigerick]

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	12 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop & Mobile H&HX	Mobile U Only	Mobile H
Process Node	Intel 4	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	8P + 16E	4P + 4E	4P + 8E
LLC	24 MB	36 MB ?	12 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

 

[moinmoin]

How do they keep missing these massive, obvious flaws over, and over, and over again? How did they not find it out during Gelsinger's time? How did Otellini not know this?

The inefficiency regarding their IDM operation was a revelation too. HOW? Just how? What else are they not telling us? Bringing "grovian" accountability as said by Gelsinger is another matter. Why did not do it before?

Are they so messy, and filled with bureaucratic layers that it takes the CEO's multiple years to figure few of them out? Whatever magic bullet is sent to supposedly save Intel just gets shot out of the sky before it even has a chance to grow to maturity.

It went well until it didn't anymore. Nobody wanted to get his hands dirty, especially not when that would put himself in a bad light. The whole bureaucratic layers and middle management obfuscated that further. It apparently had to hurt the company as a whole until there were reactions.

 

[igor_kavinski]

Client dGPU as good as gone

That's their necessity and they still need to keep pumping money into that effort for future traction in the GPU market. The volumes may need to be low to avoid hemorrhaging too much money but they absolutely need to keep going for the sake of their iGPUs, unless LBT secures a lucrative deal with AMD to supply the iGPU. Considering how well their mobile iGPU is doing performancewise, I don't think LBT would go that route. Intel can still pare down the GPU effort to only supply lower end dGPUs and huge AI monsters with lots of VRAM and bow out of the mainstream GPU market. That could also work fine for them.

 

[511]

You don't know that for sure. They don't have to reveal that information publicly, especially about R&D stuff that could give them an edge.

Yeah ofc like the royal core team that got axed but Unified Core Is pretty much real.

Aren't people jumping too early on dGPU? Everyone thinks Arc dGPU is cancelled truth is they are here to say believe it or not Intel needs them they just need to figure out on how to make denser GPUs.

 

[jpiniero]

As I've been saying for a long time, Intel should have dumped the dGPUs once they realized 10 nm was a bust.

 

[511]

As I've been saying for a long time, Intel should have dumped the dGPUs once they realized 10 nm was a bust.

LMAO 10nm had nothing to do with dGPU except PV for which the lead process was Intel 7nm but that got delayed as well.

 

[DrMrLordX]

LMAO 10nm had nothing to do with dGPU except PV for which the lead process was Intel 7nm but that got delayed as well.

dGPU was supposed to be a dumping ground for predicted excess 10nm wafers.

 

[511]

dGPU was supposed to be a dumping ground for predicted excess 10nm wafers.

well they messed up 10nm horribly like it has to be the worst in the history of process maybe samsung is trying to copy Intel 🤣

 

[Doug S]

One of the big issues Intel had in the past was trying to catch the competition by leapfrogging them. I've talked about this before, Intel never copied or planned for gradual progress that would improve their chances to reach top spot, they came up with their own killer approach that was supposed to leave the competition behind.

THIS ^^^^

Not sure if that's "in the past" though. What is "five nodes in four years" if not exactly what you describe? Intel won't admit when the competition is starting to catch up, denies it when the competition has caught up, and digs the hole deeper as they fall further behind until it starts to affect their earnings (i.e. executive compensation) and they're forced to finally come clean.

Then they won't simply say "we're going to catch back up, then we're going to outrun them from that point". No they decide to leapfrog them and come up with a complicated plan that requires perfect execution (despite a major lack of perfect execution being the reason they fell behind in the first place) to manage said leapfrop.

The five nodes in four years has turned into four nodes in five years (since 20A was canceled, and 18A isn't going to ship in any real volume until 2026) and will at best catch them up with the competition.

 

[jpiniero]

Five CEOs in four years?

 

[511]

THIS ^^^^

Not sure if that's "in the past" though. What is "five nodes in four years" if not exactly what you describe? Intel won't admit when the competition is starting to catch up, denies it when the competition has caught up, and digs the hole deeper as they fall further behind until it starts to affect their earnings (i.e. executive compensation) and they're forced to finally come clean.

Then they won't simply say "we're going to catch back up, then we're going to outrun them from that point". No they decide to leapfrog them and come up with a complicated plan that requires perfect execution (despite a major lack of perfect execution being the reason they fell behind in the first place) to manage said leapfrop.

The five nodes in four years has turned into four nodes in five years (since 20A was canceled, and 18A isn't going to ship in any real volume until 2026) and will at best catch them up with the competition.

Yeah I would call it 4 in 4 but it's still between N3P-N2 still better than what they did 5 years before that 1 node in 4 years.

Five CEOs in four years?

Nice one but no Pat already took 3.5 years and he joined in Feb it's been 4 years already

 

[coercitiv]

Not sure if that's "in the past" though. What is "five nodes in four years" if not exactly what you describe?

"I talked about this in the past" in the sense that I already mentioned this issue of theirs, not that they've stopped doing it.

As an organization, they are too proud. Their corporate culture to deal with defeat is to plan over-complicated schemes to "leapfrog" the competition that fail to hit their target most of the time. They are the perfect example of a decaying empire ruled by shortsighted elites who only experienced winning through the sheer force of their starting position (the glory of old). They never stop to look at the underdog in the mirror.

Arrow Lake is definitely not a Zen moment, because ARL is in fact still a bi-product of experimentation and Intel hubris with regards to leapfrogging the simple and arguably rudimentary chiplet design that carried AMD all these years. Intel had this mentality that they never play catch-up, they leapfrog. (and many times in recent history they leapfrogged spectacularly wrong)

 

[igor_kavinski]

TBH, they did leapfrog compared to the Skylake++ era but in the wrong timeline where AMD exists.

 

[coercitiv]

Nice one but no Pat already took 3.5 years and he joined in Feb it's been 4 years already

Yes, and Lip-Bu Tan is the fourth CEO in four years

 

[511]

Yes, and Lip-Bu Tan is the fourth CEO in four years

I See you mean to include the co CEOs 🤣

 

[511]

It is 4 CEOs in 4 month 🙂
DECEMBER Pat retires
Co CEO in December
March Lip Bu Tan Is the CEO
Intel leapfrogged the competition here

 

[Thunder 57]

Then they won't simply say "we're going to catch back up, then we're going to outrun them from that point".

Didn't they say that when AMD was now in the review mirror?

 

[poke01]

Didn't they say that when AMD was now in the review mirror?

Intel says a lot of things, most of which are not true

 

[Joe NYC]

deleted

 

[511]

deleted

I saw that 🙂

 

[511]

I forgot to say but the recent article was on gross margin searching online Gross margin include Cost of good sold and revenue it doesn't include R&D and other expenses.

So for 50% Gross Margin the cost to produce said goods should be half.

 

[DavidC1]

Intel's GM is just under 40%. To get it to 50% they will have to improve their products significantly, or be under the illusion they are profitable such as under BK management only to cripple themselves afterwards after the bubble pops.

Oftentimes some companies make a product for one-off, just to end up continuing it or even become a focus because the success is beyond their expectations. They aren't in control of GMs - it's nearly entirely up to the market to decide.

So it still baffles me why the CEO would repeat such an obvious thing. Because saying they'll execute better and make better products is indirectly saying their revenue, thus their profits, thus their Gross Margins will rise. This doesn't inspire confidence in Lip-Bu Tan's management.

Craig Barrett - "Copy Exactly"
Paul Otellini - "Tick Tock"
Pat Gelsinger - "5N4Y"
Lip-Bu Tan - "50% GM"

 

[LightningZ71]

Every CEO has to have a "thesis.". There has to be a "way that they are going to do things differently" to justify their tenure and pay. That's his...

 

[DavidC1]

Every CEO has to have a "thesis.". There has to be a "way that they are going to do things differently" to justify their tenure and pay. That's his...

So think about it.

The above "thesis" really had merit. Each of them looked at it and thought "this is a weakness that needed to be ratified".

Is "50% GM" really going to be Lip-Bu Tan's?

 

[igor_kavinski]

This doesn't inspire confidence in Lip-Bu Tan's management.

He's trying to do the best he can with what he's got to work with. Although clearing up the middle management mess will remove a lot of unneeded cruft in the operation of the company, the main issue is that the development heads are still the same. The guys with weird ideas like

"HT is bad"

"hybrid architecture is the definitive way forward"

"must only stick to tile architecture" despite not much success with it so far

"AVX-512 matters only in workstation/server markets"

"high speed RAM is better than larger L3 cache" etc.

while AMD does all of those things with much success.

 

[DavidC1]

He's trying to do the best he can with what he's got to work with. Although clearing up the middle management mess will remove a lot of unneeded cruft in the operation of the company, the main issue is that the development heads are still the same. The guys with weird ideas like

"HT is bad"

"hybrid architecture is the definitive way forward"

There's not only one way to do things. Intel went from in-order with HT to out of order without HT at the same core size with the first two Atoms and said cutting out HT allowed adding OoOE execution. They went from 30% boost in multi-thread to 50% boost in everything.

HT also adds complexity in validation, which will potentially affect development time which over the long time is really bad. None of the mobile vendors do so, and process gains are plummeting. Post-2025 process costs 10x as much to get 1/3rd the performance and 1/3rd the density of 2000's process.

When an entire industry that cares about efficiency as a goal rejects HT, then we know that is what the path forward is in an era where Moore's Law turns into (Moore's Law)/3.

"must only stick to tile architecture" despite not much success with it so far

Data movement power costs are reduced with lower distance. So you think Intel will somehow do better with a worse setup?

"AVX-512 matters only in workstation/server markets"

"high speed RAM is better than larger L3 cache" etc.

while AMD does all of those things with much success.

Because AMD is executing better. Intel has been in brain drain state since 2010.